EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 27

• Manufacturer Part Number: EP9312-CB
• Description: System-on-Chip Processor
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CB

• Peak Reflow Compatible (260 C): No
• A/d Converter: 12 Bits
• Leaded Process Compatible: No
• No. Of I/o Pins: 65
• Package / Case: 352-BGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1257

DS785UM1
REV:
SBOOT:
LCSn7, LCSn6:
LASDO:
LEEDA:
LEECLK:
LCSn1, LCSn2:
Copyright 2007 Cirrus Logic
Revision, reads chip Version number: 0 - Rev A, 1 - Rev B,
2 - Rev C, 3 - Rev D.
Serial Boot Flag. This bit is read-only.
1
0
Latched version of CSn7 and CSn6 respectively. These
are used to define the external bus width for the boot code
boot.
Latched version of ASDO pin. Used to select synchronous
versus asynchronous boot device.
Latched version of EEDAT pin.
Define Internal or external boot:
1
0
Define Watchdog startup action:
0
0
1
1
0
1
0
1
hardware detected Serial Boot selection
hardware detected Normal Boot
Internal
External
Watchdog disabled, Reset duration disabled
Watchdog disabled, Reset duration active
Watchdog active, Reset duration disabled
Watchdog active, Reset duration active
EP93xx User’s Guide
Preface
P-5
P