UPSD3433EB40U6 STMicroelectronics, UPSD3433EB40U6 Datasheet - Page 63

• Manufacturer Part Number: UPSD3433EB40U6
• Description: MCU 8BIT 8032 128KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433EB40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-5660

uPSD34xx
15
15.1
Power saving modes
The uPSD34xx is a combination of two die, or modules, each module having its own current
consumption characteristics. This section describes reduced power modes for the MCU
Module. See
of the PSD Module. Total current consumption for the combined modules is determined in
the DC specifications at the end of this document.
The MCU Module has three software-selectable modes of reduced power operation.
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Idle Mode
Idle Mode will halt the 8032 MCU core while leaving the MCU peripherals active (Idle Mode
blocks MCU_CLK only). For lowest current consumption in this mode, it is recommended to
disable all unused peripherals, before entering Idle mode (such as the ADC and the Debug
Unit breakpoint comparators). The following functions remain fully active during Idle Mode
(except if disabled by SFR settings).
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An interrupt generated by any of these peripherals, or a reset generated from the
supervisor, will cause Idle Mode to exit and the 8032 MCU will resume normal operation.
The output state on I/O pins of MCU ports 1, 3, and 4 remain unchanged during Idle Mode.
To enter Idle Mode, the 8032 MCU executes an instruction to set the IDL bit in the SFR
named PCON, shown in
operating mode before Idle Mode is activated. Once in Idle Mode, the MCU status is entirely
preserved, and there are no changes to: SP, PSW, PC, ACC, SFRs, DATA, IDATA, or XDATA.
The following are factors related to Idle Mode exit:
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Idle Mode
Power-down Mode
Reduced Frequency Mode
External Interrupts INT0 and INT1
Timer 0, Timer 1 and Timer 2
Supervisor reset from: LVD, JTAG Debug, External RESET_IN_, but not the WTD
ADC
I
UART0 and UART1 Interfaces
SPI Interface
Programmable Counter Array
USB Interface
Activation of any enabled interrupt will cause the IDL bit to be cleared by hardware,
terminating Idle Mode. The interrupt is serviced, and following the Return from Interrupt
instruction (RETI), the next instruction to be executed will be the one which follows the
instruction that set the IDL bit in the PCON SFR.
After a reset from the supervisor, the IDL bit is cleared, Idle Mode is terminated, and
the MCU restarts after three MCU machine cycles.
2
C Interface
Section 28.1.16: Power management on page 191
Table 26 on page
66. This is the last instruction executed in normal
for reduced power modes
Power saving modes
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