UPSD3433EB40U6 STMicroelectronics, UPSD3433EB40U6 Datasheet - Page 206

MCU 8BIT 8032 128KB FLASH 80TQFP

UPSD3433EB40U6

Manufacturer Part Number
UPSD3433EB40U6
Description
MCU 8BIT 8032 128KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3433EB40U6

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5660

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UPSD3433EB40U6
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PSD module
Note:
28.5.10
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1
2
(FFh). The 8032 may erase the entire Flash memory array all at once, or erase individual
sector-by-sector, but not erase byte-by-byte. However, even though the Flash memories
cannot be erased byte-by-byte, the 8032 may program Flash memory byte-by-byte. This
means the 8032 does not need to program group of bytes (64, 128, etc.) at one time, like
some Flash memories.
Each Flash memory requires the 8032 to send an instruction sequence to program a byte or
to erase sectors (see
If the byte to be programmed is in a protected Flash memory sector, the instruction
sequence is ignored.
Important note: It is mandatory that a chip-select signal is active for the Flash sector where
a programming instruction sequence is targeted. The user must make sure that the correct
chip-select equation, FSx or CSBOOTx specified in PSDsoft Express matches the address
range that the 8032 firmware is accessing, otherwise the instruction sequence will not be
recognized by the Flash array. If memory paging is used, be sure that the 8032 firmware
sets the page register to the correct page number before issuing an instruction sequence to
the Flash memory segment on a particular memory page, otherwise the correct sector
select signal will not become active.
Once the 8032 issues a Flash memory program or erase instruction sequence, it must
check the status bits for completion. The embedded algorithms that are invoked inside a
Flash memory array provide several ways to give status to the 8032. Status may be checked
using any of three methods: Data Polling, Data Toggle, or Ready/Busy (pin PC3).
Table 108. Flash Memory Status Bit Definition
X = Not guaranteed value, can be read either '1' or '0.'
DQ7-DQ0 represent the 8032 Data Bus Bits, D7-D0.
Data polling
Polling on the Data Polling Flag Bit (DQ7) is a method of checking whether a program or
erase operation is in progress or has completed.
algorithm.
When the 8032 issues a program instruction sequence, the embedded algorithm within the
Flash memory array begins. The 8032 then reads the location of the byte to be programmed
in Flash memory to check status. The Data Polling Flag Bit (DQ7) of this location becomes
the compliment of Bit D7 of the original data byte to be programmed. The 8032 continues to
poll this location, comparing the Data Polling Flag Bit (DQ7) and monitoring the Error Flag
Bit (DQ5). When the Data Polling Flag Bit (DQ7) matches Bit D7 of the original data, then
the embedded algorithm is complete. If the Error Flag Bit (DQ5) is '1,' the 8032 should test
the Data Polling Flag Bit (DQ7) again since the Data Polling Flag Bit (DQ7) may have
changed simultaneously with the Error Flag Bit (DQ5) (see
The Error Flag Bit (DQ5) is set if either an internal time-out occurred while the embedded
algorithm attempted to program the byte (indicating a bad Flash cell) or if the 8032
Flash Memory
Functional
Block
segment is selected)
FSx, or CSBOOTx
Active (the desired
Table 107 on page
Polling
DQ7
Data
203).
e Flag
Toggl
DQ6
Figure 72
Error
DQ5
Flag
DQ4
Figure
shows the Data Polling
X
Erase
Time-
DQ3
out
72).
DQ2
X
DQ1
uPSD34xx
X
DQ0
X

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