AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 53

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AT91RM9200-CI-002

Manufacturer Part Number
AT91RM9200-CI-002
Description
IC ARM9 MCU 256 BGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-CI-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91RM9200-CI-002
Manufacturer:
Atmel
Quantity:
10 000
Function Details
Stops execution in low-power state until an interrupt occurs.
The cache line (or lines) is marked as invalid, so no cache hits occur in that line until it is re-allocated to an address.
Applies to write-back data caches. If the cache line contains stored data that has not yet been written out to the main mem-
ory, it is written to main memory immediately.
Stops the execution until all data in the write buffer has been stored in the main memory.
The memory cache line at the specified virtual address is loaded into the cache.
The operation carried out on a single cache line identifies the line using the data transferred in the MCR instruction.
The data is interpreted as using one of the two formats:
Below are the details of CP15 Register 7, or Cache Function Register, in MVA format.
• mva[31:5]: Modified Virtual Address
The non-defined bits should be zero when written and are unpredictable when read.
1768I–ATARM–09-Jul-09
• Wait for interrupt
• Invalidate
• Clean
• Drain write buffer
• Prefetch
– MVA format
– index format
31
23
15
7
mva
30
22
14
6
29
21
13
5
28
20
12
4
-
mva
mva
mva
27
19
11
3
-
26
18
10
2
-
AT91RM9200
25
17
9
1
-
24
16
8
0
-
53

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