AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 414

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AT91RM9200-CI-002

Manufacturer Part Number
AT91RM9200-CI-002
Description
IC ARM9 MCU 256 BGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-CI-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91RM9200-CI-002
Manufacturer:
Atmel
Quantity:
10 000
30.5.2
30.5.3
30.6
414
Functional Description
AT91RM9200
Power Management
Interrupt
The USART is not continuously clocked. The programmer must first enable the USART Clock in
the Power Management Controller (PMC) before using the USART. However, if the application
does not require USART operations, the USART clock can be stopped when not needed and be
restarted later. In this case, the USART will resume its operations where it left off.
Configuring the USART does not require the USART clock to be enabled.
The USART interrupt line is connected on one of the internal sources of the Advanced Interrupt
Controller. Using the USART interrupt requires the AIC to be programmed first. Note that it is not
recommended to use the USART interrupt line in edge sensitive mode.
The USART is capable of managing several types of serial synchronous or asynchronous
communications.
It supports the following communication modes.
• 5- to 9-bit full-duplex asynchronous serial communication:
• High-speed 5- to 9-bit full-duplex synchronous serial communication:
• RS485 with driver control signal
• ISO7816, T0 or T1 protocols for interfacing with smart cards
• InfraRed IrDA Modulation and Demodulation
• Test modes
– MSB- or LSB-first
– 1, 1.5 or 2 stop bits
– Parity even, odd, marked, space or none
– By-8 or by-16 over-sampling receiver frequency
– Optional hardware handshaking
– Optional modem signals management
– Optional break management
– Optional multi-drop serial communication
– MSB- or LSB-first
– 1 or 2 stop bits
– Parity even, odd, marked, space or none
– by 8 or by-16 over-sampling frequency
– Optional Hardware handshaking
– Optional Modem signals management
– Optional Break management
– Optional Multi-Drop serial communication
– NACK handling, error counter with repetition and iteration limit
– remote loopback, local loopback, automatic echo
1768I–ATARM–09-Jul-09

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