AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 36

• Manufacturer Part Number: AT91RM9200-CI-002
• Description: IC ARM9 MCU 256 BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-CI-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

11.3
11.3.1
11.3.2
11.3.3
11.3.4
36
ARM9TDMI Processor
AT91RM9200
Instruction Type
Data Types
ARM9TDMI Operating Modes
ARM9TDMI Registers
Instructions are either 32 bits (in ARM state) or 16 bits (in Thumb state).
ARM9TDMI supports byte (8-bit), half-word (16-bit) and word (32-bit) data types. Words must be
aligned to four-byte boundaries and half-words to two-byte boundaries.
Unaligned data access behavior depends on which instruction is used in a particular location.
The ARM9TDMI, based on ARM architecture v4T, supports seven processor modes:
Mode changes may be made under software control, or may be brought about by external inter-
rupts or exception processing. Most application programs will execute in User Mode. The non-
user modes, known as privileged modes, are entered in order to service interrupts or exceptions
or to access protected resources.
The ARM9TDMI processor core consists of a 32-bit datapath and associated control logic. That
datapath contains 31 general-purpose registers, coupled to a full shifter, Arithmetic Logic Unit
and multiplier.
At any one time, 16 registers are visible to the user. The remainder are synonyms used to speed
up exception processing.
Register 15 is the Program Counter (PC) and can be used in all instructions to reference data
relative to the current instruction.
R14 holds the return address after a subroutine call.
R13 is used (by software convention) as a stack pointer.
Table 11-1.
• User: Standard ARM program execution state
• FIQ: Designed to support high-speed data transfer or channel processes
• IRQ: Used for general-purpose interrupt handling
• Supervisor: Protected mode for the operating system
• Abort mode: Implements virtual memory and/or memory protection
• System: A privileged user mode for the operating system
• Undefined: Supports software emulation of hardware coprocessors
User and
System
Mode
R0
R1
R2
R3
R4
ARM9TDMI Modes and Register Layout
Supervisor
Mode
R0
R1
R2
R3
R4
Abort Mode
R0
R1
R2
R3
R4
Undefined
Mode
R0
R1
R2
R3
R4
Interrupt
Mode
R0
R1
R2
R3
R4
Interrupt
1768I–ATARM–09-Jul-09
Mode
Fast
R0
R1
R2
R3
R4