AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 206

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AT91RM9200-CI-002

Manufacturer Part Number
AT91RM9200-CI-002
Description
IC ARM9 MCU 256 BGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-CI-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91RM9200-CI-002
Manufacturer:
Atmel
Quantity:
10 000
19.7.1
Register Name:
Access Type:
Reset Value:
• MODE: SDRAMC Command Mode
This field defines the command issued by the SDRAM Controller when the SDRAM device is accessed.
• DBW: Data Bus Width
0: Data bus width is 32 bits.
1: Data bus width is 16 bits.
206
0
0
0
0
0
31
23
15
7
0
0
0
0
1
MODE
AT91RM9200
SDRAMC Mode Register
0
0
1
1
0
0
1
0
1
0
30
22
14
SDRAMC_MR
Read/Write
0x00000010
6
Description
Normal mode. Any access to the SDRAM is decoded normally.
The SDRAM Controller issues a NOP command when the SDRAM device is accessed regardless of the
cycle.
The SDRAM Controller issues an “All Banks Precharge” command when the SDRAM device is accessed
regardless of the cycle.
The SDRAM Controller issues a “Load Mode Register” command when the SDRAM device is accessed
regardless of the cycle. The address offset with respect to the SDRAM device base address is used to
program the Mode Register. For instance, when this mode is activated, an access to the “SDRAM_Base +
offset” address generates a “Load Mode Register” command with the value “offset” written to the SDRAM
device Mode Register.
The SDRAM Controller issues a “Refresh” Command when the SDRAM device is accessed regardless of
the cycle. Previously, an “All Banks Precharge” command must be issued.
29
21
13
5
DBW
28
20
12
4
27
19
11
3
26
18
10
2
MODE
25
17
9
1
1768I–ATARM–09-Jul-09
24
16
8
0

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