AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 163

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AT91RM9200-CI-002

Manufacturer Part Number
AT91RM9200-CI-002
Description
IC ARM9 MCU 256 BGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-CI-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT91RM9200-CI-002
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Quantity:
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Figure 18-12. Early Read Protocol
18.6.4
18.6.4.1
1768I–ATARM–09-Jul-09
Wait State Management
Standard Wait States
The SMC can automatically insert wait states. The different types of wait states managed are
listed below:
Each chip select can be programmed to insert one or more wait states during an access on the
corresponding memory area. This is done by setting the WSEN field in the corresponding
SMC_CSR
grammed in the NWS field in the same register.
Below is the correspondence between the number of standard wait states programmed and the
number of clock cycles during which the NWE pulse is held low:
For each additional wait state programmed, an additional cycle is added.
• Standard wait states
• External wait states
• Data float wait states
• Chip select change wait states
• Early Read wait states
0 wait states
1 wait state
D[15:0]
A[22:0]
MCK
NCS
NRD
(“SMC Chip Select Registers” on page
1/2 clock cycle
1 clock cycle
190). The number of cycles to insert is pro-
AT91RM9200
163

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