AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 224

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AT91RM9200-CI-002

Manufacturer Part Number
AT91RM9200-CI-002
Description
IC ARM9 MCU 256 BGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-CI-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91RM9200-CI-002
Manufacturer:
Atmel
Quantity:
10 000
Figure 20-8. Burst Flash Controller with No Burst Enable Handling
20.6.4.4
224
Selection Signal
Page Mode
Address Bus
Internal BFC
Clock (2)
Internal
Internal
BFAVD
BFBAA
D[15:0]
D[15:0]
A[24:0]
Output
BFWE
BFOE
BFCS
BFCK
Input
AT91RM9200
Continuous Burst Reads
(1) Only if Multiplexed Address & Data Busses
(2) Master Clock Mode (BFCC =1)
Address (1)
The BFC performs continuous burst reads. It is also possible to program page sizes from 16
bytes up to 1024 bytes. This is done by setting the appropriate value in the PAGES field of the
“Burst Flash Controller Mode Register” on page
of the BFC (Suspend). When the BFC is requested again, a new burst is started even though
the requested address is sequential to the previously requested address.
AVL
A0
Address (D0)
D0
Sampling
D0
Sampling
D1
D1
A1
D2
OEL = 1
Burst Suspend
Address Valid Latency = 4 BFCK cycles
Output Enable Latency (OEL) = 1 BFCK cycle
227.
Address (1)
No Burst Output Enable Handling (BFOEH = 0)
Signal Control Advance Address (BAAEN = 1)
Begin New Burst
Address (D2)
AVL
A2
1768I–ATARM–09-Jul-09
Sampling
D2
D2
Sampling
D3
D3
A3
D4

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