AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 286
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AT91RM9200-CI-002
Manufacturer Part Number
AT91RM9200-CI-002
Description
IC ARM9 MCU 256 BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91RM9200-EK.pdf
(41 pages)
2.AT91RM9200-DK.pdf
(2 pages)
3.AT91RM9200-QU-002.pdf
(701 pages)
Specifications of AT91RM9200-CI-002
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
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Part Number
Manufacturer
Quantity
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23.6.10
Register Name:
Access Type:
Possible limitations on PLL B input frequencies and multiplier factors should be checked before using the Clock Generator.
Value to be written in CKGR_PLLBR must not be the same as current value in CKGR_PLLBR.
• DIVB: Divider B
• PLLBCOUNT: PLL B Counter
Specifies the number of slow clock cycles before the LOCKB bit is set in PMC_SR after CKGR_PLLBR is written.
• OUTB: PLL B Clock Frequency Range
• MULB: PLL B Multiplier
0 = The PLL B is deactivated.
1 up to 2047 = The PLL B Clock frequency is the PLL B input frequency multiplied by MULB + 1.
• USB_96M: Divider by 2 Enable (only on ARM9-based Systems)
0 = USB ports clocks are PLL B Clock, therefore the PMC Clock Generator must be programmed for the PLL B Clock to be
48 MHz.
1 = USB ports clocks are PLL B Clock divided by 2, therefore the PMC Clock Generator must be programmed for the PLL
B Clock to be 96 MHz.
286
DIVB
0
1
2 - 255
31
23
15
–
7
0
0
1
1
AT91RM9200
PMC Clock Generator PLL B Register
OUTB
OUTB
30
22
14
CKGR_PLLBR
Read/Write
–
6
0
1
0
1
29
21
13
–
5
Divider Selected
Divider output is 0
Divider is bypassed
Divider output is the selected clock divided by DIVB.
PLL B Clock Frequency Range
80 MHz to 160 MHz
Reserved
150 MHz to 180 MHz
Reserved
USB_96M
28
20
12
4
MULB
DIVB
27
19
11
–
3
PLLBCOUNT
26
18
10
2
MULB
25
17
9
1
1768I–ATARM–09-Jul-09
24
16
8
0
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