AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 167
AT91RM9200-CI-002
Manufacturer Part Number
AT91RM9200-CI-002
Description
IC ARM9 MCU 256 BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91RM9200-EK.pdf
(41 pages)
2.AT91RM9200-DK.pdf
(2 pages)
3.AT91RM9200-QU-002.pdf
(701 pages)
Specifications of AT91RM9200-CI-002
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
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Figure 18-17. Chip Select Wait State
18.6.4.5
Figure 18-18. Early Read Wait States
1768I–ATARM–09-Jul-09
Early Read Wait State
Notes:
In early read protocol, an early read wait state is automatically inserted when an external write
cycle is followed by a read cycle to allow time for the write cycle to end before the subsequent
read cycle begins (see
grammed wait states (i.e., data float wait state).
No wait state is added when a read cycle is followed by a write cycle, between consecutive
accesses of the same type, or between external and internal memory accesses.
A[22:0]
D[15:0]
NWE
MCK
A[22:0]
NCS1
NCS2
NRD
NWE
MCK
NRD
NCS
1. Early Read Protocol
2. Standard Read Protocol
(1)
Write Cycle
addr Mem 1
Mem 1
(2)
Figure
Early Read Wait
Chip Select Wait
18-18). This wait state is generated in addition to any other pro-
addr Mem 2
Read Cycle
Mem 2
AT91RM9200
167
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