AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 296

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AT91RM9200-CI-002

Manufacturer Part Number
AT91RM9200-CI-002
Description
IC ARM9 MCU 256 BGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91RM9200-CI-002

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91RM9200-CI-002
Manufacturer:
Atmel
Quantity:
10 000
24.6
Table 24-1.
296
Offset
0x0000
0x0004
0x0008
0x000C
0x0010
0x0014
0x0018
0x001C
0x0020
0x0024
System Timer (ST) User Interface
AT91RM9200
Register Mapping
Register
Control Register
Period Interval Mode Register
Watchdog Mode Register
Real-time Mode Register
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Real-time Alarm Register
Current Real-time Register
This current value of the counter is compared with the value written in the alarm register
ST_RTAR (Real-time Alarm Register). If the counter value matches the alarm, the bit ALMS in
TC_SR is set. The alarm register is set to its maximum value, corresponding to 0, after a reset.
The bit RTTINC in ST_SR is set each time the 20-bit counter is incremented. This bit can be
used to start an interrupt, or generate a one-second signal.
Writing the ST_RTMR immediately reloads and restarts the clock divider with the new pro-
grammed value. This also resets the 20-bit counter.
Warning: If RTPRES is programmed with a period less or equal to the current MCK period, the
update of the RTTINC and ALMS status bits and their associated interrupt generation are
unpredictable.
Figure 24-5. Real Time Timer
SLCK
RTPRES
Divider
16-bit
ST_PIMR
ST_SR
ST_IER
ST_IDR
Name
ST_CR
ST_WDMR
ST_RTMR
ST_IMR
ST_RTAR
ST_CRTR
ALMV
Counter
20-bit
Read/Write
Read/Write
Read/Write
Read/Write
Write-only
Read-only
Write-only
Write-only
Read-only
Read-only
Access
=
RTTINC
ALMS
1768I–ATARM–09-Jul-09
Reset Value
0x00000000
0x00020000
0x00008000
0x0
0x0
0x0

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