ATMEGA128-16AI Atmel, ATMEGA128-16AI Datasheet - Page 138

• Manufacturer Part Number: ATMEGA128-16AI
• Description: IC AVR MCU 128K 16MHZ 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Q1167170A

Output Compare
Register 3 B –
OCR3BH and OCR3BL
Output Compare
Register 3 C –
OCR3CH and OCR3CL
Input Capture Register
1 – ICR1H and ICR1L
Input Capture Register
3 – ICR3H and ICR3L
Timer/Counter
Interrupt Mask
Register – TIMSK
138
ATmega128
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an output compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This Temporary Register is shared by all the other
16-bit registers.
The Input Capture is updated with the counter (TCNTn) value each time an event occurs on the
ICPn pin (or optionally on the Analog Comparator Output for Timer/Counter1). The Input Cap-
ture can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This Temporary Register is shared by all the other 16-bit
registers.
Note:
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
This register contains interrupt control bits for several Timer/Counters, but only Timer1 bits are
described in this section. The remaining bits are described in their respective timer sections.
See “Accessing 16-bit Registers” on page 114.
OCIE2
R/W
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
7
0
See “Accessing 16-bit Registers” on page 114.
TOIE2
R/W
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
6
0
TICIE1
R/W
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
5
0
OCIE1A
R/W
R/W
R/W
R/W
R/W
OCR3B[15:8]
OCR3C[15:8]
4
OCR3B[7:0]
0
4
OCR3C[7:0]
0
4
0
4
0
4
0
ICR1[15:8]
ICR3[15:8]
ICR1[7:0]
ICR3[7:0]
OCIE1B
R/W
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
3
0
TOIE1
R/W
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
2
0
OCIE0
R/W
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
1
0
TOIE0
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
OCR3BH
OCR3CH
OCR3BL
OCR3CL
ICR1H
ICR3H
ICR1L
ICR3L
TIMSK
2467V–AVR–02/11