ATMEGA128-16AI Atmel, ATMEGA128-16AI Datasheet - Page 42

• Manufacturer Part Number: ATMEGA128-16AI
• Description: IC AVR MCU 128K 16MHZ 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Q1167170A

External Clock
42
ATmega128
to the register gives the highest available frequency. The calibrated Oscillator is used to time
EEPROM and Flash access. If EEPROM or Flash is written, do not calibrate to more than 10%
above the nominal frequency. Otherwise, the EEPROM or Flash write may fail. Note that the
Oscillator is intended for calibration to 1.0MHz, 2.0MHz, 4.0MHz, or 8.0MHz. Tuning to other
values is not guaranteed, as indicated in
Table 15. Internal RC Oscillator Frequency Range.
To drive the device from an external clock source, XTAL1 should be driven as shown in
21. To run the device on an external clock, the CKSEL fuses must be programmed to “0000”. By
programming the CKOPT fuse, the user can enable an internal 36 pF capacitor between XTAL1
and GND.
Figure 21. External Clock Drive Configuration
When this clock source is selected, start-up times are determined by the SUT fuses as shown in
Table
Table 16. Start-up Times for the External Clock Selection
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. It is required to ensure that the
MCU is kept in Reset during such changes in the clock frequency.
SUT1..0
OSCCAL Value
00
01
10
11
16.
$00
$7F
$FF
Start-up Time from Power-
down and Power-save
Min Frequency in Percentage of
6 CK
6 CK
6 CK
Nominal Frequency (%)
100
50
75
EXTERNAL
SIGNAL
CLOCK
Additional Delay from
Table
Reset (V
Reserved
15.
4.1ms
65ms
–
CC
= 5.0V)
Max Frequency in Percentage of
Nominal Frequency (%)
Recommended Usage
BOD enabled
Fast rising power
Slowly rising power
100
150
200
2467V–AVR–02/11
Figure