ATMEGA128-16AI Atmel, ATMEGA128-16AI Datasheet - Page 170

• Manufacturer Part Number: ATMEGA128-16AI
• Description: IC AVR MCU 128K 16MHZ 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Q1167170A

USART
Dual USART
Overview
170
ATmega128
The Universal Synchronous and Asynchronous serial Receiver and Transmitter (USART) is a
highly flexible serial communication device. The main features are:
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The ATmega128 has two USART’s, USART0 and USART1. The functionality for both USART’s
is described below. USART0 and USART1 have different I/O registers as shown in
Summary” on page
neither is the UBRR0H or UCRS0C Registers. This means that in ATmega103 compatibility
mode, the ATmega128 supports asynchronous operation of USART0 only.
A simplified block diagram of the USART transmitter is shown in
registers and I/O pins are shown in bold.
Full Duplex Operation (Independent Serial Receive and Transmit Registers)
Asynchronous or Synchronous Operation
Master or Slave Clocked Synchronous Operation
High Resolution Baud Rate Generator
Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
Odd or Even Parity Generation and Parity Check Supported by Hardware
Data OverRun Detection
Framing Error Detection
Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter
Three Separate Interrupts on TX Complete, TX Data Register Empty, and RX Complete
Multi-processor Communication Mode
Double Speed Asynchronous Communication Mode
362. Note that in ATmega103 compatibility mode, USART1 is not available,
Figure
79. CPU accessible I/O
2467V–AVR–02/11
“Register