ATMEGA128-16AI Atmel, ATMEGA128-16AI Datasheet - Page 54

IC AVR MCU 128K 16MHZ 64-TQFP

ATMEGA128-16AI

Manufacturer Part Number
ATMEGA128-16AI
Description
IC AVR MCU 128K 16MHZ 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16AI

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Q1167170A

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Voltage Reference
Enable Signals and
Start-up Time
Watchdog Timer
54
ATmega128
The voltage reference has a start-up time that may influence the way it should be used. The
start-up time is given in
erence is on during the following situations:
1. When the BOD is enabled (by programming the BODEN fuse).
2. When the bandgap reference is connected to the Analog Comparator (by setting the
3. When the ADC is enabled.
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user
must always allow the reference to start up before the output from the Analog Comparator or
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
Table 20. Internal Voltage Reference Characteristics
The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at 1MHz. This is
the typical value at V
controlling the Watchdog Timer prescaler, the Watchdog Reset interval can be adjusted as
shown in
Timer. The Watchdog Timer is also reset when it is disabled and when a Chip Reset occurs.
Eight different clock cycle periods can be selected to determine the reset period. If the reset
period expires without another Watchdog Reset, the ATmega128 resets and executes from the
Reset Vector. For timing details on the Watchdog Reset, refer to
To prevent unintentional disabling of the Watchdog or unintentional change of time-out period, 3
different safety levels are selected by the Fuses M103C and WDTON as shown in Table 21.
Safety level 0 corresponds to the setting in ATmega103. There is no restriction on enabling the
WDT in any of the safety levels. Refer to
the Watchdog Timer” on page 57
Symbol
ACBG bit in ACSR).
V
t
I
BG
BG
BG
Table 22 on page
Parameter
Bandgap reference voltage
Bandgap reference start-up time
Bandgap reference current consumption
CC
Table
= 5V. See characterization data for typical values at other V
56. The WDR – Watchdog Reset – instruction resets the Watchdog
20. To save power, the reference is not always turned on. The ref-
for details.
“Timed Sequences for Changing the Configuration of
1.15
Min
1.23
Typ
page
40
10
53.
Max
1.40
70
Units
µA
µs
2467V–AVR–02/11
V
CC
levels. By

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