ATMEGA128-16AI Atmel, ATMEGA128-16AI Datasheet - Page 96

• Manufacturer Part Number: ATMEGA128-16AI
• Description: IC AVR MCU 128K 16MHZ 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: Q1167170A

Compare Match
Output Unit
Compare Output Mode
and Waveform
Generation
96
ATmega128
(FOC0) strobe bit in normal mode. The OC0 Register keeps its value even when changing
between waveform generation modes.
Be aware that the COM01:0 bits are not double buffered together with the compare value.
Changing the COM01:0 bits will take effect immediately.
The Compare Output mode (COM01:0) bits have two functions. The waveform generator uses
the COM01:0 bits for defining the Output Compare (OC0) state at the next compare match. Also,
the COM01:0 bits control the OC0 pin output source.
the logic affected by the COM01:0 bit setting. The I/O registers, I/O bits, and I/O pins in the fig-
ure are shown in bold. Only the parts of the General I/O Port Control Registers (DDR and PORT)
that are affected by the COM01:0 bits are shown. When referring to the OC0 state, the reference
is for the internal OC0 Register, not the OC0 pin.
Figure 37. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the output compare (OC0) from the waveform
generator if either of the COM01:0 bits are set. However, the OC0 pin direction (input or output)
is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction Regis-
ter bit for the OC0 pin (DDR_OC0) must be set as output before the OC0 value is visible on the
pin. The port override function is independent of the waveform generation mode.
The design of the output compare pin logic allows initialization of the OC0 state before the out-
put is enabled. Note that some COM01:0 bit settings are reserved for certain modes of
operation.
The waveform generator uses the COM01:0 bits differently in normal, CTC, and PWM modes.
For all modes, setting the COM01:0 = 0 tells the Waveform Generator that no action on the OC0
Register is to be performed on the next compare match. For compare output actions in the non-
PWM modes refer to
and for phase correct PWM refer to
A change of the COM01:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the
FOC0 strobe bits.
See “8-bit Timer/Counter Register Description” on page 103.
COMn1
COMn0
FOCn
clk
I/O
Table 53 on page
Waveform
Generator
Table 55 on page
104. For fast PWM mode, refer to
D
D
D
PORT
DDR
OCn
Q
Q
Q
Figure 37
105.
1
0
shows a simplified schematic of
Table 54 on page
OCn
Pin
2467V–AVR–02/11
104,