UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 710
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UPD70F3769GF-GAT-AX
Manufacturer Part Number
UPD70F3769GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3769GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3769GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 710 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(7) AV
(8) Reading ADA0CRn register
(9) External trigger mode
(a) The AV
(b) The AV
(c) If the source supplying power to the AV
When the ADA0M0 to ADA0M2, ADA0S, ADA0PFM, or ADA0PFT register is written, the contents of the ADA0CRn
register may be undefined. Read the conversion result after completion of conversion and before writing to the
ADA0M0 to ADA0M2, ADA0S, ADA0PFM, or ADA0PFT register.
acknowledged, the contents of the ADA0CRn register may be undefined.
completion of conversion and before the next external/timer trigger is acknowledged. The correct conversion result
may not be read at a timing different from the above.
When using the external trigger mode, the input trigger during A/D conversion will not be acknowledged.
Note Parasitic inductance
REF0
function ports. In an application where a backup power supply is used, be sure to supply the same potential as
V
the AV
voltage may fluctuate due to the current that flows during conversion (especially, immediately after the
conversion operation enable bit ADA0CE has been set to 1). As a result, the conversion accuracy may drop.
To avoid this, it is recommended to connect a capacitor across the AV
reference voltage fluctuation as shown in Figure 15-15.
a diode), the voltage when conversion is enabled may be lower than the voltage when conversion is stopped,
because of a voltage drop caused by the A/D conversion current.
DD
pin
to the AV
REF0
REF0
REF0
pin has a high impedance or if the power supply has a low current supply capability, the reference
pin is also used as the reference voltage pin of the A/D converter. If the source supplying power to
pin is used as the power supply pin of the A/D converter and also supplies power to the alternate-
REF0
pin as shown in Figure 15-15.
Main power supply
Figure 15-15. AV
REF0
Note
REF0
pin has a high DC resistance (for example, because of insertion of
Pin Processing Example
AV
AV
REF0
SS
Also, when an external/timer trigger is
CHAPTER 15 A/D CONVERTER
REF0
Read the conversion result after
and AV
SS
pins to suppress the
Page 710 of 1408
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