UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 1123

• Manufacturer Part Number: UPD70F3769GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-U 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3769GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
3
2
1
0
Bit position
RD
SF
WDH
SO
Bit name
Resume Detected
Indicates that Resume has been detected.
This bit is set to “1” when asserting of the resume signal by a device on the USB bus is
detected. This bit is not set if USB Resume is issued by the host controller driver (HCD).
Writing “1” to this bit clears the interrupt to “0”.
StartOfFrame
Indicates that HccaFrameNumber was updated at the beginning of a frame. The OHCI host
controller transmits the SOF packet and updates HccaFrameNumber.
Writing “1” to this bit clears the interrupt to “0”.
Writeback Done Head
Indicates that the USB host controller updated HccDoneHead. The OHCI host controller
sets this bit immediately to “1” after updating HccaDoneHead, and does not update
HccaDoneHead until this bit is cleared to “0”.
Writing “1” to this bit clears the interrupt to “0”.
Scheduling Overrun
Indicates that the USB scheduling in a frame has overrun. This bit is set to “1” after
updating of FrameNumberUpdate of the frame following the frame in which the USB
scheduling overruns. When this bit is set to “1”, the SOC field of the HcCommandStatus
register is incremented.
Writing “1” to this bit clears the interrupt to “0”.
1: An RD interrupt has occurred.
0: An RD interrupt has not occurred.
1: An SF interrupt has occurred.
0: An SF interrupt has not occurred.
1: A WDH interrupt has occurred.
0: A WDH interrupt has not occurred.
1: An SO interrupt has occurred.
0: An SO interrupt has not occurred.
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
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