UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 242
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3769GF-GAT-AX
Manufacturer Part Number
UPD70F3769GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3769GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3769GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 242 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(b) Operation if TAAnCCR0 register is set to FFFFH
If the TAAnCCR0 register is set to FFFFH, the 16-bit counter counts up to FFFFH. The counter is cleared to
0000H in synchronization with the next count-up timing. The INTTAAnCC0 signal is generated and the output
of the TOAAm0 pin is inverted. At this time, an overflow interrupt request signal (INTTAAnOV) is not generated,
nor is the overflow flag (TAAmOPT0.TAAmOVF bit) set to 1.
Remark
INTTAAnCC0 signal
TAAnCCR0 register
TOAAm0 pin output
m = 0 to 3, 5
n = 0 to 5
16-bit counter
TAAnCE bit
FFFFH
0000H
count clock cycle
Interval time
10000H ×
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
count clock cycle
Interval time
10000H ×
FFFFH
count clock cycle
Interval time
10000H ×
Page 242 of 1408
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