UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 1141
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3769GF-GAT-AX
Manufacturer Part Number
UPD70F3769GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3769GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3769GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
17
16
15 to 10
9
8
7-5
Bit position R/W
R
W
R
W
−
−
−
−
PESC
CSC
LSDA
CPP
PPS
SPP
Bit name
−
−
Port Enable Status Change
Indicates that the PES bit has been cleared (0).
This bit is set (1) along with the PES bit being cleared (0) because the port state is
changed from Enable to Disable due to a hardware event such as an overcurrent
state, device disconnection, power-off or bubble error.
This bit is cleared (0) when “1” is written via the host controller driver (HCD).
Connect Status Change
Indicates that the CCS bit has been changed.
This bit is set (1) when the CCS bit status is changed due to connection or
disconnection of a USB device.
This bit is set (1) when a request for port reset, port suspend or port enable is issued
while a USB device is disconnected, so that the driver can re-evaluate the device
connection.
This bit is cleared to 0 when “1” is written via the host controller driver (HCD).
Reserved. (Be sure to write “0” to these bits.)
Low Speed Device Attached
Indicates the speed of the device connected to the USB port.
The bit is enabled only when the CCS bit is set.
Clear Port Power
Turns port power off.
Writing “1” to this bit turns the port power off. Writing “0” to this bit is ignored.
Port Power Status
Indicates the port power status.
The control method varies depending on the power switch time.
Set Port Power
Turns port power on when power control is performed in port units.
Writing “1” to this bit turns the port power on. Writing “0” to this bit is ignored.
Reserved. (Be sure to write “0” to these bits.)
1: The PES bit status has changed. (PES cleared)
0: The PES bit status has not changed.
1: The CCS bit status has changed.
0: The CCS bit status has not changed.
1: A low-speed device is connected.
0: A full-speed device is connected.
1: Port power on
0: Port power off
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
Page 1141 of 1408
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