UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 1122

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UPD70F3769GF-GAT-AX

Manufacturer Part Number
UPD70F3769GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet

Specifications of UPD70F3769GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3769GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(4) HcInterruptStatus register (Offset 0CH)
31
30
29 to 7
6
5
4
Bit position
After reset: 0000 0000H
OC
RHSC
FNO
UE
Bit name
Reserved. (Be sure to write “0” to these bits.)
Ownership Change
Indicates the occurrence of an Ownership Change interrupt.
This bit is set (1) when the OCR field of the HcCommandStatus register is set to “1”.
An SMMI interrupt occurs if the interrupt source is not masked.
Writing “1” to this bit clears the interrupt source.
Reserved. (Be sure to write “0” to these bits.)
Root Hub Status Change
Indicates that the HcRhPortStatus register setting has been changed.
This bit is set to “1” when the status of the HcRhPortStatus register has been changed due
to hardware.
Writing “1” to this bit clears the interrupt source.
Frame Number Overflow
Indicates that the MSB of a frame number has been changed.
This bit is set to “1” after HccaFrameNumber is updated in a frame whose frame number
MSB changes from “0” to “1”, or “1” to “0”.
Writing “1” to this bit clears the interrupt source.
Unrecoverable Error
Indicates that a system error has been detected on the PCI bus not related to the USB.
Writing “1” to this bit clears the interrupt source.
1: An OC interrupt has occurred.
0: An OC interrupt has not occurred.
1: An RHSC interrupt has occurred.
0: An RHSC interrupt has not occurred.
1: An FNO interrupt has occurred.
0: An FNO interrupt has not occurred.
1: A UE interrupt has occurred.
0: A UE interrupt has not occurred.
31
15
23
0
0
0
7
0
R/W
RHSC
OC
30
22
14
0
0
6
FNO
29
21
13
5
0
0
0
UE
28
12
20
0
0
0
4
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
RD
27
19
11
0
0
0
3
SF
26
18
10
0
0
0
2
WDH
25
17
0
0
9
0
1
SO
24
16
0
0
8
0
0
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