UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 169
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UPD70F3769GF-GAT-AX
Manufacturer Part Number
UPD70F3769GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3769GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3769GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 169 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
4.5
4.5.1
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(1) In the V850ES/JG3-U and V850ES/JH3-U, the general-purpose port functions share pins with several peripheral
Cautions
function I/O pins. Switch between the general-purpose port (port mode) and the peripheral function I/O pin
(alternate-function mode) by setting the PMCn register. Note the following cautions with regards to this register
setting sequence.
(a) Cautions on switching from port mode to alternate-function mode
Cautions on setting port pins
Switch from the port mode to alternate-function mode in the following order.
<1> Set the PFn register
<2> Set the PFCn and PFCEn registers:
<3> Set the corresponding bit of the PMCn register to 1: Switch to alternate-function mode
<4> Set the INTRn and INTFn registers
If the PMCn register is set first, note that unexpected operations may occur at that moment or depending on
the change of the pin states in accordance with the setting of the PFn, PFCn, and PFCEn registers.
A concrete example is shown in [Example] below.
Notes 1. N-ch open-drain output pin only
Caution Regardless of the port mode/alternate-function mode, the Pn register is read and written as
[Example] SCL01 pin setting example
2. Only when the external interrupt function is selected
• Pn register read: Read the port output latch value (when PMn.PMnm bit = 0), or read the
• Pn register write: Write to the port output latch
follows.
The SCL01 pin is used alternately as the P41/SOF0 pin. Select the valid pin function using the
PMC4, PFC4, and PF4 registers.
0
1
PMC41 Bit
Note 1
don’t care
0
1
:
PFC41 Bit
pin states (PMn.PMnm bit = 1).
Note 2
:
1
1
1
PF41 Bit
N-ch open-drain setting
Alternate-function selection
External interrupt setting
P41 (in output port mode, N-ch open-drain output)
SOF0 output (N-ch open-drain output)
SCL01 I/O (N-ch open-drain output)
CHAPTER 4 PORT FUNCTIONS
Valid Pin Function
Page 169 of 1408
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