UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 1207
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UPD70F3769GF-GAT-AX
Manufacturer Part Number
UPD70F3769GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3769GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3769GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
23.6 External Interrupt Request Input Pins (NMI and INTP00 to INTP18)
23.6.1 Noise elimination
23.6.2 Edge detection
a valid edge is enabled by using the INTF0 and INTR0 register (the NMI pin functions as a normal port pin).
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(1) Eliminating noise on NMI pin
(2) Eliminating noise on INTP00, INTP01, and INTP03 to INTP18 pins
(3) Eliminating noise on INTP02
The valid edge of each of the NMI and INTP00 to INTP18 pins can be selected from the following four.
• Rising edge
• Falling edge
• Both rising and falling edges
• No edge detected
The edge of the NMI pin is not detected after reset. Therefore, the interrupt request signal is not acknowledged unless
The NMI pin has an internal noise elimination circuit that uses analog delay. Therefore, the input level of the NMI
pin is not detected as an edge unless it is maintained for a specific time or longer. Therefore, an edge is detected
after specific time.
The NMI pin can be used to release the STOP mode. In the STOP mode, noise is not eliminated by using the
system clock because the internal system clock is stopped.
The INTP00, INTP01, and INTP03 to INTP18 pins have an internal noise elimination circuit that uses analog delay.
Therefore, the input level of the NMI pin is not detected as an edge unless it is maintained for a specific time or
longer. Therefore, an edge is detected after specific time.
The INTP02 pin has an internal noise elimination circuit that uses analog delay and an internal digital noise
elimination circuit. Either can be selected by using the noise elimination control register (INTNFC) (see 23.6.2 (7)).
CHAPTER 23 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Page 1207 of 1408
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