UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 157
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3769GF-GAT-AX
Manufacturer Part Number
UPD70F3769GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3769GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3769GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 157 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(1) Port DL register (PDL)
(2) Port DL mode register (PMDL)
PMDL (PMDLH)
PDL (PDLH)
Remarks 1. The PMDL register can be read or written in 16-bit units.
Remarks 1. The PDL register can be read or written in 16-bit units.
After reset: 0000H (output latch)
(PDLL)
(PMDLL)
After reset: FFFFH
2. To read/write bits 8 to 15 of the PDL register in 8-bit or 1-bit units, specify them as
2. To read/write bits 8 to 15 of the PMDL register in 8-bit or 1-bit units, specify them as
PDL15
PDLn
PDL7
However, when using the higher 8 bits of the PMDL register as the PMDLH register
and the lower 8 bits as the PMDLL register, they can be read or written in 8-bit or 1-bit
units.
bits 0 to 7 of the PMDLH register.
However, when using the higher 8 bits of the PDL register as the PDLH register and
the lower 8 bits as the PDLL register, they can be read or written in 8-bit or 1-bit units.
bits 0 to 7 of the PDLH register.
PMDL15 PMDL14 PMDL13 PMDL12 PMDL11 PMDL10
PMDLn
PMDL7
15
0
1
15
0
1
Outputs 0.
Outputs 1.
PDL14
PDL6
Output mode
Input mode
PMDL6
14
14
R/W
PDL13
Output data control (in output mode) (n = 0 to 15)
PDL5
PMDL5
13
Address:
13
R/W
PDL12
PDL4
PMDL4
I/O mode control (n = 0 to 15)
12
Address: PDL FFFFF004H,
12
PMDL FFFFF024H,
PMDLL FFFFF024H, PMDLH FFFFF025H
PDL11
PDL3
PMDL3
11
PDLL FFFFF004H, PDLH FFFFF005H
11
PDL10
PDL2
PMDL2
10
10
CHAPTER 4 PORT FUNCTIONS
PDL9
PDL1
PMDL9
PMDL1
9
9
PDL8
PDL0
PMDL8
PMDL0
8
8
Page 157 of 1408
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