UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 1136
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3769GF-GAT-AX
Manufacturer Part Number
UPD70F3769GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3769GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3769GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
8
7 to 0
Bit position
PSM
NDP[7:0]
Bit name
Power Switching Mode
Defines how to control root hub port power switching.
Ports are only controlled by the SPP and CPP bits of the HcRhPortStatus register if the
PPCM field of the HcRhDescriptorB register is set (1). If it is cleared (0), ports are
controlled by the SGP and CGP bits. The setting of this bit becomes valid only when the
NPS bit is cleared to “0”.
Number Downstream Port
Defines the number of downstream ports supported by the root hub of the OHCI host
controller.
This field is fixed to 02H because the OHCI host controller incorporates two downstream
ports.
These bits are read-only.
1: Power for ports is controlled individually.
0: Power for all ports is controlled simultaneously.
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
Page 1136 of 1408
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