UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 1238

• Manufacturer Part Number: UPD70F3769GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-U 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3769GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
Item
Subclock oscillator (f
Internal oscillator (f
PLL
CPU
DMA controller
Interrupt controller
Timer
Real-time counter (RTC)
Watchdog timer (WDT2)
Serial interface
A/D converter
D/A converter
Real-time output function (RTO)
Key interrupt function (KR)
CRC operation circuit
External bus interface
Port function
Internal data
USB function
USB host
Note Be sure to stop the PLL (PLLCTL.PLLON bit = 0) before stopping the main clock.
Caution When the CPU is operating on the subclock and main clock oscillation is stopped, accessing a
Setting of Subclock Operation Mode
register in which a wait occurs is disabled. If a wait is generated, it can be released only by reset
(see 3.4.8 (2)).
R
TAA0 to TAA5
TAB0, TAB1
TMM0 to TMM3
TMT0
CSIF0 to CSIF4
I
UARTC0 to UARTC4
2
)
C00 to I
XT
)
2
C02
Table 25-10. Operating Status in Subclock Operation Mode
Oscillation enabled
Oscillation enabled
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
See CHAPTER 5 BUS CONTROL FUNCTION.
Settable
Settable
Operable
Operable
When Main Clock Is Oscillating
Operating Status
CHAPTER 25 STANDBY FUNCTION
Stops operation
Stops operation
Stops operation
Operable when f
the count clock
Operable when f
count clock
Operable when f
count clock
Operable when the SCKFn input clock is
selected as the count clock (n = 0 to 4)
Stops operation
Stops operation (but UARTC0 is operable
when the ASCKC0 input clock is
selected)
Stops operation
Stops operation (output held)
Stops operation
Stops operation
When Main Clock Is Stopped
Note
R
XT
R
/8 or f
or f
is selected as the
XT
XT
is selected as the
is selected as
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