UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 1145

• Manufacturer Part Number: UPD70F3769GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-U 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3769GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(2) PCI cycle error interrupt (INTUSBH1)
(3) PME interrupt (INTUSBH2)
Scheduling Overrun
Writeback DoneHead
Start Of Frame
Resume Detected
Unrecoverable Error
Frame Number Overflow
Root Hub Status
Change
Ownership Change
The PCI cycle error interrupt (INTUSBH1) occurs when a data access that causes an error is performed for the
OHCI or PCI bus bridge register area (in 32-bit access). This interrupt is used for debugging, and is not used
during normal operation.
The PME interrupt is an interrupt signal for power management, which can be used to report the USB bus status
change to the system when PCLK is not supplied.
The following lists the events that may occur on the USB bus and support for interrupts.
To use the PME interrupt, the PME Enable bit of the Power Management Control/Status register in OHCI host
configuration registers and the int_pme_en bit of the PCI interrupt control register in PCI host bridge registers must
be set to “1” in advance.
Interrupt Source
Indicates the occurrence of USB scheduling overrun in a frame.
Indicates the occurrence of writeback when the USB host controller ends TD.
Indicates the update of HccaFmNumber upon a start of a frame.
Indicates the detection of resume signal sent from a USB device.
Indicates the detection of error not related to USB (PCI abort).
Indicates the change of FrameNumber15 bit of the HcFmNumber register (0 → 1 or 1 → 0)
Indicates the change of the HcRhStatus/HcRhPortStatus status.
This interrupt source is classified based on the following event details.
Indicates the occurrence of Ownership Request.
This interrupt is reported to SMMI only.
OverCurrent Indicate Change
Connect Status Change
Port Enable Status Change
Port Suspend Status Change
Port Reset Status Change
Overcurrent Indicate
Connect
Disconnect
Resume (RemoteWakeUp)
Table 21-8. Sources of Interrupt INTA and SMMI
Table 21-9. PME Interrupt Sources
Event
CHAPTER 21 USB HOST CONTROLLER (USBH)
Indicates the occurrence of overcurrent state.
Indicates the device connection/disconnection to the USB
bus.
Indicates that the port is disabled due to a USB error.
Indicates the completion of resume sequence
Indicates the completion of USB reset
Occurs.
Occurs.
Does not occur.
Occurs.
Occurrence of Interrupts
Description
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