UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 438
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3769GF-GAT-AX
Manufacturer Part Number
UPD70F3769GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3769GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3769GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 438 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(2) TMT0 control register 1 (TT0CTL1)
The TT0CTL1 register is an 8-bit register that controls the TMT0 operation.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
TT0CTL1
After reset: 00H
TT0EST
TT0EEE
The TT0EEE bit selects whether counting is performed with the internal count clock
or the valid edge of the external event count input.
TT0MD3
The read value of the TT0EST bit is always 0.
0
1
0
0
1
0
0
0
0
0
0
0
0
1
7
Disables operation with external event count input (EVTT0 pin).
(Performs counting with the count clock selected by the
TT0CTL0.TT0CKS0 to TT0CTL0.TT0CKS2 bits.)
Generates a valid signal for external trigger input.
• In one-shot pulse output mode: A one-shot pulse is output with writing
• In external trigger pulse output mode: A PWM waveform is output with
Enables operation with external event count input (EVTT0 pin).
(Performs counting at every valid edge of the external event count input
signal (EVTT0 pin).)
R/W
TT0EST
TT0MD2
Other than above
1 to the TT0EST bit as the trigger.
writing 1 to the TT0EST bit as the trigger.
6
0
0
0
0
1
1
1
1
0
Address: FFFFF601H
TT0EEE
TT0MD1
5
0
0
1
1
0
0
1
1
0
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
TT0MD0
4
0
Software trigger control
0
1
0
1
0
1
0
1
0
Count clock selection
TT0MD3 TT0MD2 TT0MD1 TT0MD0
Interval timer mode
External event count mode
External trigger pulse output mode
One-shot pulse output mode
PWM output mode
Free-running timer mode
Pulse width measurement mode
Triangular-wave PWM output mode
Encoder compare mode
Setting prohibited
−
3
Timer mode selection
2
1
0
Page 438 of 1408
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