UPD70F3769GF-GAT-AX Renesas Electronics America, UPD70F3769GF-GAT-AX Datasheet - Page 353
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3769GF-GAT-AX
Manufacturer Part Number
UPD70F3769GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3769GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3769GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 353 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(1) Interval timer mode operation flow
Remark
<1> Count operation start flow
<2> Count operation stop flow
INTTABnCC0 signal
TABnCCR0 register
(TABnCKS0 to TABnCKS2 bits)
TOABn0 pin output
n = 0, 1
Register initial setting
16-bit counter
TABnCTL1 register,
TABnCCR0 register
TABnIOC0 register,
TABnCTL0 register
TABnCE bit = 1
TABnCE bit = 0
TABnCE bit
Figure 8-5. Software Processing Flow in Interval Timer Mode
START
FFFFH
STOP
0000H
<1>
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
D
0
The initial setting of these registers is performed
before setting the TABnCE bit to 1.
The TABnCKS0 to TABnCKS2 bits can be
set at the same time when counting has
been started (TABnCE bit = 1).
The counter is initialized and counting is
stopped by clearing the TABnCE bit to 0.
D
0
D
0
D
0
<2>
Page 353 of 1408
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