UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 919

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Notes 1.
Remark The special function register (SFR) mounted depend on the product. See 3.2.4 Special function registers
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM
Processor mode control register (PMC)
Port registers (P0 to P8, P12, P14, P15) (output latches)
Port mode registers
Port input mode registers (PIM3, PIM7, PIM8)
Port output mode registers (POM3, POM7)
Pull-up resistor option registers (PU0, PU1, PU3 to PU5, PU7, PU12, PU14)
Clock operation mode control register (CMC)
Clock operation status control register (CSC)
System clock control register (CKC)
40 MHz internal high-speed oscillation control register (DSCCTL)
Oscillation stabilization time counter status register (OSTC)
Oscillation stabilization time select register (OSTS)
Noise filter enable registers 0, 1, 2 (NFEN0, NFEN1, NFEN2)
Peripheral enable registers 0, 1, 2 (PER0, PER1, PER2)
Operation speed mode control register (OSMC)
Timer array unit
(TAUS)
2.
During reset signal generation or oscillation stabilization time wait, only the PC contents among the
hardware statuses become undefined. All other hardware statuses remain unchanged after reset.
When a reset is executed in the standby mode, the pre-reset status is held even after reset.
(SFRs) and 3.2.5 Extended special function registers (2nd SFRs: 2nd Special Function Registers).
Timer data registers 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 10, 11 (TDR00,
TDR01, TDR02, TDR03, TDR04, TDR05, TDR06, TDR07, TDR08, TDR09,
TDR10, TDR11)
Timer mode registers 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 10, 11 (TMR00,
TMR01, TMR02, TMR03, TMR04, TMR05, TMR06, TMR07, TMR08, TMR09,
TMR10, TMR11)
Timer status registers 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 10, 11 (TSR00,
TSR01, TSR02, TSR03, TSR04, TSR05, TSR06, TSR07, TSR08, TSR09,
TSR10, TSR11)
Timer input select register 0 (TIS0)
Timer counter registers 00, 01, 02, 03, 04, 05, 06, 07, 08, 09, 10, 11 (TCR00,
TCR01, TCR02, TCR03, TCR04, TCR05, TCR06, TCR07, TCR08, TCR09,
TCR10, TCR11)
Timer channel enable status register 0 (TE0)
Timer channel start register 0 (TS0)
Timer channel stop register 0 (TT0)
Timer clock select 0 (TPS0)
Timer output register 0 (TO0)
Timer output enable register 0 (TOE0)
Timer output level register 0 (TOL0)
Data memory
General-purpose registers
PM0 to PM8, PM12, PM15
PM14
Table 19-2. Hardware Statuses After Reset Acknowledgment (1/4)
Hardware
CHAPTER 19 RESET FUNCTION
User’s Manual U19678EJ1V1UD
The contents of the
reset vector table
(0000H, 0001H) are set.
Undefined
06H
Undefined
Undefined
00H
00H
FFH
FEH
00H
00H
00H
00H
C0H
09H
00H
00H
07H
00H
00H
00H
0000H
0000H
0000H
00H
FFFFH
0000H
0000H
0000H
0000H
0000H
0000H
0000H
Acknowledgment
After Reset
Note 2
Note 2
Note 1
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