UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 517
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1211GB-GAF-AX
Manufacturer Part Number
UPD78F1211GB-GAF-AX
Description
MCU 16BIT 78K0R/LX3 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1211GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1211GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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TO02 pin output before Hi-Z control
TO03 pin output before Hi-Z control
(Example of the output of the TMOFF0 (rising edge detection), TMOFF1 (falling edge detection), TO02, and
<1> The TO02 and TO03 pin outputs become a Hi-Z state when the falling edge of the TMOFF1 pin input is
<2> The Hi-Z state of the TO02 and TO03 pin outputs is canceled in synchronization with the carrier cycle of
<3> The TO02 and TO03 pin outputs become a Hi-Z state when the rising edge of the TMOFF0 pin input is
<4> The Hi-Z state of the TO02 and TO03 pin outputs is canceled in synchronization with the carrier cycle of
(positive-phase output)
(reverse-phase output)
(positive-phase PWM)
(reverse-phase PWM)
Hi-Z control signal 0
detected.
the timer after the rising edge of the TMOFF1 pin input is detected.
detected.
the timer after the falling edge of the TMOFF0 pin input is detected.
TMOFF1 pin input
TMOFF0 pin input
TO02 pin output
TO03 pin output
Carrier period
Figure 7-101. Overcurrent Detection Example 2
CHAPTER 7 INVERTER CONTROL FUNCTIONS
Forcible output stop function 0
User’s Manual U19678EJ1V1UD
<1>
TO03 pins)
<2>
Forcible output stop function 1
<3>
<4>
515
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