UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 804

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

802
(1) Master operation in single-master system
Note Release (SCL0 and SDA0 pins = high level) the I
Remark
product that is communicating. If EEPROM is outputting a low level to the SDA0 pin, for example, set the
SCL0 pin in the output port mode, and output a clock pulse from the output port until the SDA0 pin is
constantly at high level.
Conform to the specifications of the product that is communicating, with respect to the transmission and
reception formats.
No
No
Figure 14-28. Master Operation in Single-Master System
Setting STCEN, IICRSV = 0
ACKE = WTIM = SPIE = 1
IICCTL0 ← 0XX111XXB
IICCTL0 ← 1XX111XXB
IICWL, IICWH ← XXH
Initializing I
interrupt occurs?
interrupt occurs?
interrupt occurs?
End of transfer?
SVA ← XXH
STCEN = 1?
Writing IICA
Writing IICA
Setting port
IICF ← 0XH
Setting port
ACKD = 1?
ACKD = 1?
TRC = 1?
IICE = 1
INTIICA
STT = 1
INTIICA
INTIICA
SPT = 1
Restart?
START
No
Yes
2
Yes
Yes
Yes
Yes
Yes
Yes
Yes
C bus
CHAPTER 14 SERIAL INTERFACE IICA
Note
Waits for detection of the stop condition.
Yes
No
No
No
No
No
No
Prepares for starting communication
(generates a stop condition).
User’s Manual U19678EJ1V1UD
Starts transmission.
Waits for data transmission.
Prepares for starting communication
(generates a start condition).
Starts communication
(specifies an address and transfer
direction).
Waits for detection of acknowledge.
Setting of the port used alternatively as the pin to be used.
First, set the port to input mode and the output latch to 0 (see 14.3 (8) Port mode register 6 (PM6)).
Sets a transfer clock.
Sets a local address.
Sets a start condition.
Set the port from input mode to output mode and enable the output of the I
(see 14.3 (8) Port mode register 6 (PM6)).
SPT = 1
END
2
C bus in conformance with the specifications of the
WTIM = WREL = 1
interrupt occurs?
interrupt occurs?
End of transfer?
Reading IICA
WREL = 1
ACKE = 1
ACKE = 0
WTIM = 0
INTIICA
INTIICA
Yes
Yes
Yes
No
No
No
Waits for data
reception.
Waits for detection
of acknowledge.
Starts reception.
2
C bus