UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 173
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UPD78F1211GB-GAF-AX
Manufacturer Part Number
UPD78F1211GB-GAF-AX
Description
MCU 16BIT 78K0R/LX3 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1211GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Price
Company:
Part Number:
UPD78F1211GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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4.2.8 Port 7
mode register 7 (PM7). When the P70 and P77 pins are used as an input port, use of an on-chip pull-up resistor can
be specified in 1-bit units by pull-up resistor option register 7 (PU7).
bit units using port input mode register 7 (PIM7).
units using port output mode register 7 (POM7).
P70/SO01/INTP4
P71/SI01/INTP5
P72/SCK01/
INTP6
P73/SO00/TxD0
/TO10
P74/SI00/RxD0/
TI10
P75/SCK00/TI11
P76
P77
Port 7 is I/O port with an output latch. Port 7 can be set to the input mode or output mode in 1-bit units using port
Input to the P71, P72, P74, and P75 pins can be specified through a normal input buffer or a TTL input buffer in 1-
Output from the P70, P72, P73, and P75 pins can be specified as N-ch open-drain output (V
This port can also be used for serial interface data I/O, clock I/O, external interrupt request input, and timer I/O.
Reset signal generation sets port 7 to input mode.
Figures 4-14 to 4-19 show block diagrams of port 7.
Notes 1. In the 38-pin products of the 78K0R/IB3 and in the 78K0R/IC3, INTP4 and INTP5 are shared with P121
Cautions 1.
2. In the 78K0R/IB3, TxD0 and RxD0 are shared with P10 and P11, respectively.
3. In the 38-pin products of the 78K0R/IC3, RxD0 is shared with P72.
and P122, respectively.
2.
To use P70/SO01/INTP4, P71/SI01/INTP5, P72/SCK01/INTP6, P73/SO00/TxD0/TO10, P74/SI00/
RxD0/TI10, P75/SCK00/TI11 (38-pin products of 78K0R/IC3: P72/INTP6/RxD0, P73/TxD0/TO10)
as a general-purpose port, note the serial array unit setting. For details, refer to the following
tables.
In case of the 44-pin and 48-pin products of 78K0R/IC3, 78K0R/ID3, and 78K0R/IE3
In case of the 78K0R/IB3
To use P73/SO00/TxD0/TO10 (38-pin products of 78K0R/IC3: P73/TxD0/TO10) as a general-
purpose port, set bit 10 (TO10) of timer output register 0 (TO0) and bit 10 (TOE10) of timer
output enable register 0 (TOE0) to “0”, which is the same as their default status setting.
78K0R/IB3
• Table 13-7 Relationship Between Register Settings and Pins (Channel 0: CSI00, UART0
• Table 13-10 Relationship Between Register Settings and Pins (Channel 1: CSI01, UART0
• Table 13-6 Relationship Between Register Settings and Pins (Channel 0: UART0
• Table 13-9 Relationship Between Register Settings and Pins (Channel 1: UART0
Transmission)
Reception).
−
−
−
−
Transmission)
Reception).
Note 1
Note 1
Note 2
Note 2
−
−
−
−
P72/INTP6/RxD0
P73/TxD0/TO10
(38-pin)
−
−
−
Note 1
Note 1
Note 3
−
−
−
CHAPTER 4 PORT FUNCTIONS
User’s Manual U19678EJ1V1UD
78K0R/IC3
(44-pin)
√
√
√
√
√
√
−
−
(48-pin)
√
√
√
√
√
√
−
−
78K0R/ID3
√
√
√
√
√
√
−
−
DD
tolerance) in 1-bit
78K0R/IE3
√
√
√
√
√
√
√
√
171
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