UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 303
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1211GB-GAF-AX
Manufacturer Part Number
UPD78F1211GB-GAF-AX
Description
MCU 16BIT 78K0R/LX3 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1211GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1211GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(25) Noise filter enable registers 1, 2 (NFEN1, NFEN2)
Remarks 1. When the LIN-bus communication function is used, select the input signal of the RxD0 pin
Notes 1. The ISC4 to ISC2 bits are not provided in the 78K0R/IB3. In the 78K0R/IB3, these bits are fixed to 0.
Cautions 1. Be sure to clear bits 7 to 5 to “0”.
NFEN1 and NFEN2 are used to set whether the noise filter can be used for the timer input signal to each
channel.
Enable the noise filter by setting the corresponding bits to 1 on the pins in need of noise removal.
When the noise filter is ON, match detection and synchronization of the 2 clocks is performed with the
operation clock (f
(f
NFEN1 and NFEN2 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears NFEN1 and NFEN2 to 00H.
MCK
).
2. 78K0R/IE3 : P17/TI09
2. The presence or absence of channel0, 1 and 8 to 11 of timer I/O pins in each timer array
2. When RxD0 functions alternately as a timer input pin, the corresponding timer input pin
by setting ISC1 to 1.
unit channel depends on the product. For details, see Table 6-1 Timer I/O Pins Included in
Each Product or Tables 6-3 to 6-5 I/O Pins That Can Be Selected for Channels 0, 1, and 8 to
11. For products that do not provide timer I/O pins for channels 0, 1, and 8 to 11, only the
P52/SLTI/SLTO pin can be selected as a timer I/O pin.
channels can also be used for the LIN-bus function. The timer channels in each version
of the 78K0R/Ix3 that can be used for the LIN-bus function in addition to timer channel 7
are shown below.
MCK
78K0R/IB3 (P11/RxD0/TI03/TO03)
38-pin products of 78K0R/IC3 (P72/INTP6/RxD0)
44-pin and 48-pin products of 78K0R/IC3, 78K0R/ID3,
78K0R/IE3 (P74/RxD0/TI10/SI00)
). When the noise filter is OFF, only synchronization is performed with the operation clock
CHAPTER 6 TIMER ARRAY UNIT TAUS
User’s Manual U19678EJ1V1UD
: Channel 3 of TAUS
: None
: Chanel 10 of TAUS
301
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