UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 723

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Reception interrupt
Here is the flow of signal processing.
<1> The wakeup signal is detected by detecting an interrupt edge (INTP0) on a pin. When the wakeup signal is
<2> When the start bit of SBF is detected, reception is started and serial data is sequentially stored in the RXD0
<3> When SBF reception has been correctly completed, start channel 7 of the timer array unit TAUS and
<4> Calculate a baud rate error from the bit interval of sync field (SF). Stop UART0 once and adjust (re-set) the
<5> The checksum field should be distinguished by software. In addition, processing to initialize UART0 after the
Edge detection
Note Timer channel 7 can be used for the LIN-bus function in all products of the 78K0R/Ix3.
R
X
detected, enable reception of UART0 (RXE01 = 1) and wait for SBF reception.
register (= bits 7 to 0 of the serial data register 01 (SDR01)) at the set baud rate. When the stop bit is
detected, the reception end interrupt request (INTSR0) is generated. When data of low levels of 11 bits or
more is detected as SBF, it is judged that SBF reception has been correctly completed. If data of low levels of
less than 11 bits is detected as SBF, it is judged that an SBF reception error has occurred, and the system
returns to the SBF reception wait status.
measure the bit interval (pulse width) of the sync field (see 6.7.5 Operation as input signal high-/low-level
width measurement).
baud rate.
checksum field is received and to wait for reception of SBF should also be performed by software.
D0 (input)
(INTSR0)
LIN Bus
Capture
(INTP0)
Also, when RxD0 functions alternately as a timer input pin, the corresponding timer input pin channels can
also be used for the LIN-bus function. The timer channels in each version of the 78K0R/Ix3 that can be
used for the LIN-bus function in addition to timer channel 7 are shown below.
timer
78K0R/IB3 (P11/RxD0/TI03/TO03)
38-pin products of 78K0R/IC3 (P72/INTP6/RxD0)
44-pin and 48-pin products of 78K0R/IC3, 78K0R/ID3,
78K0R/IE3 (P74/RxD0/TI10/SI00)
Disable
Wakeup signal
<1>
frame
Enable
Figure 13-87. Reception Operation of LIN
CHAPTER 13 SERIAL ARRAY UNIT
Disable
Sync break
13-bit SBF
reception
User’s Manual U19678EJ1V1UD
field
<2>
<3>
Sync field
reception
SF
Enable
<4>
Identification
: Channel 3 of TAUS
: None
: Chanel 10 of TAUS
reception
field
ID
Data filed Data filed Checksum
reception
Data
reception
Data
reception
Data
field
<5>
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