UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 670

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

668
Figure 13-47. Flowchart of Master Transmission/Reception (in Continuous Transmission/Reception Mode)
Caution
Remark
<1> Select the buffer empty interrupt.
Writing 1 to MD0n0 bit
After setting the SAU0EN bit of peripheral enable register 0 (PER0) to 1, be sure to set
serial clock select register 0 (SPS0) after 4 or more f
<1> to <8> in the figure correspond to <1> to <8> in Figure 13-46 Timing Chart of Master
Transmission/Reception (in Continuous Transmission/Reception Mode).
<3>
<6>
Yes
No
SMR0n, SCR0n:
SDR0n[15:9]:
SO0, SOE0:
CHAPTER 13 SERIAL ARRAY UNIT
<2>
<4>
<5>
<7>
<8>
User’s Manual U19678EJ1V1UD
Reading receive data from
Reading receive data from
Clearing SAU0EN bit of PER0
Setting operation clock by
Setting SAU0EN bit of PER0
Starting CSI communication
Clearing 0 to MD0n0 bit
Writing transmit data to
Communication continued?
End of communication
Writing 1 to SS0n bit
Writing 1 to ST0n bit
SIOp (=SDR0n[7:0])
SIOp (=SDR0n[7:0])
SIOp (=SDR0n[7:0])
Communication data
Port manipulation
Buffer empty interrupt
Transfer end interrupt
SPS0 register
Setting communication
Setting transfer rate
Setting output and SCKp output
No
TSF0n = 1?
Yes
Yes
register to 1
register to 0
generated?
generated?
exists?
Yes
No
No
No
Yes
CLK
clocks have elapsed.
Specify the initial settings while the SE0n
bit of serial channel enable status
register 0 (SE0) is 0 (operation is
stopped).