UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 684

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

682
(2) Operation procedure
Caution
After setting the SAU0EN bit of peripheral enable register 0 (PER0) to 1, be sure to set
serial clock select register 0 (SPS0) after 4 or more f
Stopping communication
Starting communication
Setting SMR0n register
Setting SCR0n register
Setting SDR0n register
Writing to SS0 register
Starting initial settings
Setting PER0 register
Setting SPS0 register
Starting setting to stop
Setting ST0 register
Figure 13-57. Initial Setting Procedure for Slave Reception
Setting port
Figure 13-58. Procedure for Stopping Slave Reception
CHAPTER 13 SERIAL ARRAY UNIT
User’s Manual U19678EJ1V1UD
Release the serial array unit from the
reset status and start clock supply.
Set the operation clock.
Set an operation mode, etc.
Set a communication format.
Set bits 15 to 9 to 0000000B for baud
rate setting.
Enable data input and clock input of the
target channel by setting a port register
and a port mode register.
Set the SS0n bit of the target channel to 1
and set SE0n bit to 1 (to enable operation).
Wait for a clock from the master.
Write 1 to the ST0n bit of the target
channel.
Stop communication in midway.
CLK
clocks have elapsed.