UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 207

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(4) Port input mode registers (PIM3, PIM7, PIM8)
PIM7
Symbol
PIM3
PIM8
PIM3 and PIM7 registers set the input buffer of P31, P32, P71, P72, P74, or P75 in 1-bit units.
TTL input buffer can be selected during serial communication with an external device of the different potential.
PIM8 is used to enable or disable the inputs to P80 to P83 in 1-bit units. When using a comparator or an
programmable gain amplifier, the digital inputs are disabled (use P8n pin as the analog input) by software
processing.
disabled (use PIM8 register as the analog input) by default.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
To use port functions, INTP3, INTP7, TMOFF0, TMOFF1 , the digital inputs must be enabled, because they are
Note 1
PIMmn
PIM8n
Notes 1. Those are not provided in the 78K0R/IB3.
7
0
0
0
0
1
0
1
2. Those are not provided in the 38-pin products of the 78K0R/IC3.
Normal input buffer
TTL input buffer
Disables digital input (use P8n pin as the analog input)
Enables digital input
6
0
0
0
PIM75
5
0
0
Figure 4-41. Format of Port Input Mode Register
Note 2
PIM74
4
0
0
CHAPTER 4 PORT FUNCTIONS
Note 2
User’s Manual U19678EJ1V1UD
PIM83
P8n pin digital input enable/disable selection
3
0
0
Pmn pin input buffer selection
(m = 3 and 7; n = 1, 2, 4, 5)
PIM32
PIM72 PIM71
PIM82
Note 1
2
(n = 0 to 3)
PIM31
PIM81
1
Note 2
PIM80
0
0
0
Address
F0043H
F0047H
F0048H
After reset
00H
00H
00H
R/W
R/W
R/W
R/W
205