UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 755

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UPD78F1211GB-GAF-AX

Manufacturer Part Number
UPD78F1211GB-GAF-AX
Description
MCU 16BIT 78K0R/LX3 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1211GB-GAF-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1211GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
13.8 Relationship Between Register Settings and Pins
unit.
13.8.1 Relationship Between Register Settings and Pins of Channel 0
Tables 13-5 to 13-12 show the relationship between register settings and pins for each channel of the serial array
(1) 78K0R/IB3
(2) 38-pin products of 78K0R/IC3
Notes 1. SE0 register is a read-only status register which is set using the SS0 register and ST0 register.
Remark
Notes 1. SE0 register is a read-only status register which is set using the SS0 register and ST0 register.
Remark
SE00
SE00
Table 13-6. Relationship Between Register Settings and Pins (Channel 0: UART0 transmission)
0
1
0
1
Table 13-5. Relationship Between Register Settings and Pins (Channel 0: UART0 Reception)
Note 1
Note 1
2. This pin can be set as a port function pin.
3. This is 0 or 1, depending on the communication operation. For details, refer to 13.3 (12) Serial output
4. When using UART0 transmission and reception in a pair, set channel 1 to UART0 reception (refer to
2. This pin can be set as a port function pin.
3. This is 0 or 1, depending on the communication operation. For details, refer to 13.3 (12) Serial output
4. When using UART0 transmission and reception in a pair, set channel 1 to UART0 reception (refer to
MD002 MD001 SOE00 SO00 TXE00 RXE00
MD002 MD001 SOE00 SO00 TXE00 RXE00
register 0 (SO0).
Table 13-8).
register 0 (SO0).
Table 13-9).
0
0
0
0
X: Don’t care
X: Don’t care
1
1
1
1
0
1
0
1
Note 3
Note 3
0/1
0/1
CHAPTER 13 SERIAL ARRAY UNIT
1
1
User’s Manual U19678EJ1V1UD
0
1
0
1
0
0
0
0
PM10
PM73
Note 2
Note 2
0
0
×
×
P10
P73
Note 2
Note 2
1
1
×
×
transmission
transmission
Operation
Operation
Operation
Operation
UART1
UART1
mode
mode
Notes 4
mode
mode
Notes 4
stop
stop
TxD0/TI02/TO02/P10
TxD0/TO10/P73
TI02/TO02/P10
Pin Function
Pin Function
TO10/P73
TxD0
TxD0
753

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