UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 909

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remarks 1.
Item
System clock
CPU
Flash memory
RAM
Port (latch)
Timer array unit TAUS
Inverter control function
Real-time counter (RTC)
Watchdog timer
Clock output/buzzer output
A/D converter
Programmable gain amplifier
Comparator
Serial array unit (SAU)
Serial interface (IICA)
Multiplier/divider
DMA controller
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
IL
2.
STOP Mode Setting
f
f
f
f
f
f
The functions mounted depend on the product.
Functions.
IH
IH40
X
EX
XT
IL
f
f
f
f
IH
X
EX
XT
: Internal high-speed oscillation clock
: 40 MHz internal high-speed oscillation clock
: X1 clock
: External main system clock
: XT1 clock
:Internal low-speed oscillation clock
Clock supply to the CPU is stopped
Stopped
Status before STOP mode was set is retained
Set by bits 0 (WDSTBYON) and 4 (WTON) of option byte (000C0H)
• WTON = 0: Stops
• WTON = 1 and WDSTBYON = 1: Oscillates
• WTON = 1 and WDSTBYON = 0: Stops
Operation stopped
Operation stopped
The value is retained
Status before STOP mode was set is retained
Operation disabled
Operable
Set by bits 0 (WDSTBYON) and 4 (WTON) of option byte (000C0H)
• WTON = 0: Stops
• WTON = 1 and WDSTBYON = 1: Operates
• WTON = 1 and WDSTBYON = 0: Stops
Operable only when subsystem clock is selected as the count clock
Operation disabled
Wakeup by address match operable
Operation disabled
Operable
When CPU Is Operating on
Table 18-2. Operating Statuses in STOP Mode
Oscillation Clock (f
Internal High-Speed
When STOP Instruction Is Executed While CPU Is Operating on Main System Clock
CHAPTER 18 STANDBY FUNCTION
User’s Manual U19678EJ1V1UD
IH
)
When CPU Is Operating on
See 1.6
X1 Clock (f
X
Block Diagram and 1.7
)
External Main System Clock
When CPU Is Operating on
(f
EX
)
Outline of
907