UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 721
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
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Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
14.8 Operation of Simplified I
(SCL) and serial data (SDA). This communication function is designed to execute single communication with devices such
as EEPROM, flash memory, and A/D converter, and therefore, can be used only by the master.
conditions are observed.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
This is a clocked communication function to communicate with two or more devices by using two lines: serial clock
Make sure by using software, as well as operating the control registers, that the AC specifications of the start and stop
[Data transmission/reception]
[Interrupt function]
[Error detection flag]
* [Functions not supported by simplified I
Note When receiving the last data, ACK will not be output if 0 is written to the SOEmn (SOEm register) bit and serial
Remarks 1.
• Master transmission, master reception (only master function with a single master)
• ACK output function
• Data length of 8 bits
• Manual generation of start condition and stop condition
• Transfer end interrupt
• Overrun error
• Parity error (ACK error)
• Slave transmission, slave reception
• Arbitration loss detection function
• Wait detection function
(When an address is transmitted, the address is specified by the higher 7 bits, and the least significant bit is
used for R/W control.)
communication data output is stopped. See the processing flow in 14.8.3 (2) for details.
2.
m: Unit number (m = 0, 1), n: Channel number (n = 0, 2)
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: mn = 02
78K0R/KF3-L, 78K0R/KG3-L:
To use an I
2
C bus of full function, see CHAPTER 15 SERIAL INTERFACE IICA.
Note
and ACK detection function
2
C (IIC10, IIC20) Communication
2
C]
mn = 02, 10
CHAPTER 14 SERIAL ARRAY UNIT
721
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