UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 552
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
13.2 Configuration of A/D Converter
(1) ANI0 to ANI15 pins
(2) PGAO (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L only)
(3) Sample & hold circuit
(4) A/D voltage comparator
(5) Array
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
The A/D converter includes the following hardware.
These are the analog input pins of the sixteen channels of the A/D converter. They input analog signals to be
converted into digital signals. Pins other than the one selected as the analog input pin can be used as I/O port pins.
This is the programmable gain amplifier output signal from the PGAI pin. The A/D converter can perform A/D
conversion by selecting the output signal of the programmable gain amplifier as the analog input.
The sample & hold circuit samples each of the analog input voltages sequentially sent from the input circuit, and
sends them to the A/D voltage comparator. This circuit also holds the sampled analog input voltage during A/D
conversion.
This A/D voltage comparator compares the voltage generated from the voltage tap of the array with the analog input
voltage. If the analog input voltage is found to be greater than the reference voltage (1/2 AV
comparison, the most significant bit (MSB) of the successive approximation register (SAR) is set. If the analog input
voltage is less than the reference voltage (1/2 AV
After that, bit 10 of the SAR register is automatically set, and the next comparison is made. The voltage tap of the
array is selected by the value of bit 11, to which the result has been already set.
The voltage tap of the array and the analog input voltage are compared and bit 10 of the SAR register is manipulated
according to the result of the comparison.
Comparison is continued like this to bit 0 of the SAR register.
The array generates the comparison voltage input from an analog input pin.
Remark ANI0 to ANI9: 78K0R/KC3-L (40-pin, 44-pin)
Bit 11 = 0: (1/4 AV
Bit 11 = 1: (3/4 AV
Analog input voltage ≥ Voltage tap of array: Bit 10 = 1
Analog input voltage ≤ Voltage tap of array: Bit 10 = 0
ANI0 to ANI10: 78K0R/KC3-L (48-pin) and 78K0R/KD3-L
ANI0 to ANI11: 78K0R/KE3-L, 78K0R/KF3-L
ANI0 to ANI15: 78K0R/KG3-L
REF
REF
)
)
REF
), the MSB bit of the SAR is reset.
CHAPTER 13 A/D CONVERTER
REF
) as a result of the
552
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