UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 111
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
(2) Control mode
3.2.13 P130, P131 (port 13)
Note
(1) Port mode
(2) Control mode
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
P130/INTP1
P131/TI06/TO06
P130 functions as a 1-bit output port. P131 functions as a 1-bit I/O port. These pins also function as timer I/O.
Remark When the device is reset, P130 outputs a low level. Therefore, to output a high level from P130 before the
P120 to P124 function as external interrupt request input, potential input for external low-voltage detection, connecting
resonator for main system clock, connecting resonator for subsystem clock, and external clock input for main system
clock.
(a) INTP0
(b) EXLVI
(c) X1, X2
(d) EXCLK
(e) XT1, XT2
P130 functions as a 1-bit output port.
P131 functions as a 1-bit I/O port. P131 can be set to input or output port using port mode register 13 (PM13). Use
of an on-chip pull-up resistor can be specified by pull-up resistor option register 13 (PU13).
P131 functions as timer I/O.
(a) TI06
(b) TO06
TI06/TO06 is shared with P06, in the 78K0R/KF3-L.
This is an external interrupt request input pin for which the valid edge (rising edge, falling edge, or both rising and
falling edges) can be specified.
This is a potential input pin for external low-voltage detection.
These are the pins for connecting a resonator for main system clock.
This is an external clock input pin for main system clock.
These are the pins for connecting a resonator for subsystem clock.
This is a pin for inputting an external count clock/capture trigger to 16-bit timer 06.
This is a timer output pin from 16-bit timer 06.
device is reset, the output signal of P130 can be used as a pseudo reset signal of the CPU (see the figure for
Remark in 6.2.13 Port 13).
(
μ
PD78F10xx: xx = 10, 11, 12,
78K0R/KF3-L
27, 28)
−
√
Note
CHAPTER 3 PIN FUNCTIONS (78K0R/KF3-L, 78K0R/KG3-L)
(
μ
PD78F10xx: xx = 13, 14,
78K0R/KG3-L
29, 30)
√
√
111
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