UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 442
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
8.5.4 Collective manipulation of TOmn bit
timer channel start register m (TSm). Therefore, the TOmn bit of all the channels can be manipulated collectively.
to the relevant bits of the channel used to perform output (TOmn).
done to the TOmn bit, it is ignored and the output change by timer operation is normally done.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
In timer output register m (TOm), the setting bits for all the channels are located in one register in the same way as
Only the desired bits can also be manipulated by enabling writing only to the TOmn bits (TOEmn = 0) that correspond
Writing is done only to the TOmn bit with TOEmn = 0, and writing to the TOmn bit with TOEmn = 1 is ignored.
TOmn (channel output) to which TOEmn = 1 is set is not affected by the write operation. Even if the write operation is
(Caution and Remark are given on the next page.)
TOE0
Before writing
After writing
TO0
TO0
Data to be written
0
0
0
0
TO07
TO06
TO05
TO04
TO03
TO02
TO01
TO00
Figure 8-37. TOmn Pin Statuses by Collective Manipulation of TOmn Bit
0
0
0
0
0
0
0
0
Figure 8-36. Example of TOmn Bit Collective Manipulation
Before writing
0
0
0
0
0
0
0
0
0
0
0
0
Writing to the TO0n bit
0
0
0
0
0
0
0
0
TOE07
TO07
TO07
O
0
1
1
0
TOE06
TO06
TO06
O
0
1
1
0
Two or more TO0n output can
be changed simultaneously
TOE05
TO05
TO05
CHAPTER 8 TIMER ARRAY UNIT
×
1
0
1
1
Output does not change
when value does not
change
Writing to the TO0n bit is
ignored when TOE0n
= 1
TOE04
TO04
TO04
O
0
0
0
0
TOE03
TO03
TO03
×
0
1
0
0
TOE02
TO02
TO02
×
0
1
0
0
TOE01
TO01
TO01
×
1
1
1
1
TOE00
TO00
TO00
×
0
1
1
0
442
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