UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 220
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 220 of 1171
- Download datasheet (8Mb)
78K0R/Kx3-L
5.2.10 Port 12
Remark √: Mounted
mode register 12 (PM12). When used as an input port, use of an on-chip pull-up resistor can be specified by pull-up
resistor option register 12 (PU12).
connecting resonator for main system clock, connecting resonator for subsystem clock, and external clock input for main
system clock.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
P120/INTP0/
EXLVI
P121/X1
P122/X2/
EXCLK
P123/XT1
P124/XT2
P120 is an I/O port with an output latch. Port 12 can be set to the input mode or output mode in 1-bit units using port
P121 to P124 are input ports.
This port can also be used for external interrupt request input, potential input for external low-voltage detection,
Reset signal generation sets port 12 to input mode.
Figures 5-22 to 5-24 show block diagrams of port 12.
Caution The function setting on P121 to P124 is available only once after the reset release. The port once set
for connection to an oscillator cannot be used as an input port unless the reset is performed.
(
μ PD78F100y: y = 0 to 3)
40-pin
−
−
78K0R/KC3-L
CHAPTER 5 PORT FUNCTIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
√
√
√
44-pin
√
√
(
μ PD78F100y: y = 1 to 3)
78K0R/KC3-L (48-pin)
√
√
√
√
√
(
μ PD78F100y: y = 4 to 6)
78K0R/KD3-L
√
√
√
√
√
(
μ PD78F100y: y = 7 to 9)
78K0R/KE3-L
√
√
√
√
√
220
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