UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 240
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
(4) Port input mode registers (PIM3, PIM7, PIM8)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Symbol
PIM3
PIM7
PIM8
The PIM3 and PIM7 registers set the input buffer of P31, P32, P71, P72, P74, or P75 in 1-bit units.
TTL input buffer can be selected during serial communication with an external device of the different potential.
The PIM8 register is used to enable or disable the digital inputs to P80 to P83 in 1-bit units. When using a
comparator or a programmable gain amplifier, the digital inputs are disabled (used as analog input) by software
processing. To use port functions and alternative functions, the digital inputs must be enabled, because they are
disabled (used as analog input) by default.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Note In the case of the 40-pin product, be sure to clear PIM82 bit of the PIM8 register to “0”.
PIMmn
PIM8n
7
0
0
0
0
1
0
1
Normal input buffer
TTL input buffer
Disables digital input (used as analog input)
Enables digital input
6
0
0
0
PIM75
CHAPTER 5 PORT FUNCTIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
5
0
0
Figure 5-39. Format of Port Input Mode Register
PIM74
4
0
0
PIM83
3
0
0
P8n pin digital input buffer selection
Pmn pin input buffer selection
(m = 3 and 7; n = 1, 2, 4, 5)
PIM82
PIM32
PIM72
2
Note
(n = 0 to 3)
PIM31
PIM71
PIM81
1
PIM80
0
0
0
Address
F0043H
F0047H
F0048H
After reset
00H
00H
00H
R/W
R/W
R/W
R/W
240
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