UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 391
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
(3) Multiple PWM (Pulse Width Modulation) output
Remark
Note
Cautions 1. The following rules apply when using multiple channels simultaneously.
By extending the PWM function and using one master channel and two or more slave channels, up to seven types
of PWM signals that have a specific period and a specified duty factor can be generated.
m: Unit number (m = 0, 1), n: Channel number (n = 0, 2, 4, 6)
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: mn = 00, 02, 04, 06
78K0R/KF3-L, 78K0R/KG3-L:
p: Slave channel number 1, q: Slave channel number 2
When m = 0: n < p < q ≤ 7
When m = 1: n < p < q ≤ 3
(Where p and q are a consecutive integer greater than n)
Since there is no function of timer I/O, the channel 1 in the 78K0R/KC3-L (40-pin) can not be used as the
slave channel.
2. Only the 78K0R/KC3-L (44-pin, 48-pin), 78K0R/KD3-L, and 78K0R/KE3-L include the SLTI and SLTO
For details about the rules of simultaneous channel operation function, see 8.4 Basic Rules of
Simultaneous Channel Operation Function.
pins.
• Only an even-numbered channel (channel 0, 2, 4, …) can be specified as the master channel.
• Only channels with lower channel numbers than the master channel can be specified as slave
channels (multiple slave channels can be set).
Operation clock
Channel n (master)
Channel p (slave)
Channel q (slave)
Compare operation
Compare operation
Compare operation
mn = 00, 02, 04, 06, 10, 12
Note
Interrupt signal (INTTMmn)
Timer output
Timer output
(TOmp)
(TOmq)
CHAPTER 8 TIMER ARRAY UNIT
Duty
Duty
Period
Period
391
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