UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 142
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 142 of 1171
- Download datasheet (8Mb)
78K0R/Kx3-L
• Processor mode control register (PMC)
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
This register sets the flash memory space for mirroring to area from F0000H to FFFFFH.
The PMC register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Note This setting is prohibited in products other than the
Cautions 1. In products other than the
and 78F1030.
Address: FFFFEH After reset: 00H R/W
2. Set the PMC register only once during the initial settings prior to operating the DMA controller.
3. After setting the PMC register, wait for at least one instruction and access the mirror area.
Symbol
PMC
sure to set bit 0 (MAA) to 0 (default value).
Rewriting the PMC register other than during the initial settings is prohibited.
Figure 4-10. Format of Configuration of Processor Mode Control Register (PMC)
MAA
7
0
0
1
00000H to 0FFFFH is mirrored to F0000H to FFFFFH
10000H to 1FFFFH is mirrored to F0000H to FFFFFH
Selection of flash memory space for mirroring to area from F0000H to FFFFFH
6
0
μ
PD78F1011 to 78F1014, 78F1027, 78F1028, 78F1029, and 78F1030, be
5
0
0
4
μ
PD78F1011 to 78F1014, 78F1027, 78F1028, 78F1029,
3
0
CHAPTER 4 CPU ARCHITECTURE
2
0
Note
1
0
MAA
<0>
142
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