UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 618
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 618 of 1171
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78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address F0043H
Address F0047H
Address F0040H
Address F0041H
Address F004EH
(16) Port input mode registers 0, 1, 3, 7, 14 (PIM0, PIM1, PIM3, PIM7, PIM14)
Symbol
Symbol
Symbol
Symbol
Symbol
PIM14
PIM3
PIM7
PIM0
PIM1
These registers set the input buffer of ports 0, 1, 3, 7, and 14 in 1-bit units.
The port input mode registers to be set differ depending on the product.
78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: PIM3, PIM7
78K0R/KF3-L, 78K0R/KG3-L:
The PIM0, PIM1, PIM3, PIM7, and PIM14 registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears the PIM0, PIM1, PIM3, PIM7, and PIM14 registers to 00H.
PIMmn
PIMmn
Figure 14-21. Format of Port Input Mode Registers 0, 1, and 14 (PIM0, PIM1, PIM14)
0
1
0
1
7
0
7
0
7
0
7
0
7
0
After reset: 00H
After reset: 00H
After reset: 00H
After reset: 00H
After reset: 00H
Figure 14-20. Format of Port Input Mode Registers 3 and 7 (PIM3 and PIM7)
Normal input buffer
TTL input buffer
Normal input buffer
TTL input buffer
6
0
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
R/W
(78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
PIM75
5
0
5
5
0
5
0
5
0
(78K0R/KF3-L, 78K0R/KG3-L)
Pmn pin input buffer selection (m = 0, 1, 14; n = 0 to 4)
Pmn pin input buffer selection (m = 3, 7; n = 1, 2, 4, 5)
PIM0, PIM1, PIM14
PIM74
PIM04
4
0
4
4
4
0
4
0
PIM143
PIM03
3
0
3
0
3
3
0
3
CHAPTER 14 SERIAL ARRAY UNIT
PIM142
PIM32
PIM72
2
2
2
0
2
0
2
PIM31
PIM71
PIM11
1
1
1
0
1
1
0
PIM10
0
0
0
0
0
0
0
0
0
618
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